COE Cadence


To encourage train the students to carry the projects in the field of VLSI and to get the jobs in VLSI companies.


  • Every year more than 60 students are being trained in the field of analog and digital IC design with industry standards.
  • 22 students were selected as physical design engineers in Entuple Technology and are getting trained.

Scope of COE

Analog, Digital and RF circuits can be designed using all the resources available and can be fabricated using PCB machine.

Major Resources Available:

  2. XILINX ISE 14.4
  3. VIVADO Design suite
  4. Sparton 3 and 3E FPGA/CPLD KITS
  5. ZYNQ Boards
  6. DELL, Intel core i3 process with 4 GB RAM
  7. PCB Machine

FDP’S/SDP’S Conducted

S.No. Name of the FDP/SDP Number of Trainees
1 Cadence Tools 20 faculty-MLRIT
2 Analog and Digital IC design using Cadence 25 faculty-MLRIT
5 faculty-MLRITM
3 “Recent trends and approaches in Analog/Digital low power VLSI design” 20 faculty- MLRIT
15 faculty- other institutes